1. Field of the Invention
The present invention relates to an automatic register backup/restore system and method, more particularly, to an automatic register backup/restore system and method for a microprocessor.
2. Description of the Related Art
Conventional microprocessors have similar structure and method for handling an exception. When an exception occurs, the conventional microprocessor enters an operation mode to handle the exception. Before the subroutine of the exception is executed, the status information of the microprocessor must be stored. After the exception is completed, the stored status is restored such that the original program can resume its operation correctly as if the exception never happens.
Therefore, some registers are needed to store program counter value, and some registers are used for storing the status information of the microprocessor. In detail, some auxiliary registers, for example to store kind of the exception, are called as special-purposed register. Whatever kind of exception occurs, the contents of the register must be stored into memory before the subprogram of the exception is executed. And, before the subprogram of the exception is completed, the contents must be restored into the original register from memory so as to execute the original program. However, the extra instruction is needed to call the subprogram and to execute the exception procedure so as to achieve data movement between memory and the register. Some improved structure is developed to reduce data movement between memory and the register.
Referring to U.S. Pat. No. 5,159,680, entitled “RISC processing unit which selectively isolates register windows by indicating usage of adjacent register windows in status register,” the patent relates to data processing apparatus and methods for enhancing the operation of a reduced instruction set computer system. The register windows are designed to utilize in Scalable Processor Architecture type microprocessor (SPARC), and enhance the efficiency of SPARC type microprocessor. Each window register group has a number of input registers, a similar number of output registers, and a number of local registers. The window register groups are physically arranged so the input registers of each group are the same physical registers as those of the next adjacent group to form one large ring or circular processor arrangement. This arrangement can obtain fast message transmission between the internal procedure. When switching the procedure, the contents of the register need not be stored into the memory in order to reduce data movement between register and memory. However, the register windows will increase the area of chip and the usage efficiency of the register windows is not good by considering various application environments.
U.S. Pat. No. 5,701,493, entitled “Exception handling method and apparatus in data processing systems,” utilizes various operation modes to distinguish the type of various exceptions, not only an exception mode. Each operation mode controls different registers. If the processor accepts the exception, the processor switches to a corresponding operation mode according to the exception type. Referring to FIG. 1, a register file 10 comprises six registers 11, 12, 13, 14, 15 and 16, wherein the five bits of the register CPSR are used for determining six operation modes.
U.S. Pat. No. 5,386,563, entitled “Register substitution during exception processing,” utilizes special banked registers belonging to special mode, while the other mode cannot access the special banked registers. The purpose of the patent is to fast switch the mode so as to reduce data movement between the memory and the register.
ROC Patent Application under Publication No. 494644, entitled “Method for selecting register,” improves the banked registers of the U.S. Pat. No. 5,386,563. The six modes are transformed to two modes, as mode 0 and mode 1. The objective of the patent is to reduce the bits and time for selecting mode.
The conventional technique needs to switch the register windows or to switch the modes in order to select the register, and bits are necessary for controlling the switch. Besides, the access time for register will increase. Therefore, it is necessary to provide an innovative and progressive fuel cell so as to solve the above problem.